









                          Dunfield MicroScope Compiler



                           Target Definition Compiler

                                    for the

                              Dunfield MicroScope

                                    Debugger



                                  Release 1.0

                               Revised 27-May-01










                          Dunfield Development Systems
                          ----------------------------
                             High quality tools for
                              Embedded Development
                                 at low prices.

                            http://www.dunfield.com


                       Copyright 1988-2005 Dave Dunfield
                              All rights reserved



                          Dunfield MicroScope Compiler

                               TABLE OF CONTENTS


                                                                         Page

     1. INTRODUCTION                                                        1


     2. Source File Format                                                  1

        2.1 Comments                                                        1
        2.2 Numeric Values                                                  1
        2.3 Memory Block Definition                                         2
        2.4 Target Parameters                                               2
        2.5 CPU Register Definitions                                        6
        2.6 CPU Register Default Values                                     6
        2.7 Preassigned Symbols                                             7
        2.8 Kernel Command Sequences                                        7
        2.9 Disassembler Commands                                           9
        2.10 Opcode -> Instruction Definitions                             13

     3. The DMS Test Utility                                               15


     4. DMS Kernel Simulator                                               16

    Dunfield MicroScope Compiler                                     Page: 1


    1. INTRODUCTION

       DMSC is a compiler which takes a text definition of a  target  system
       and turns it into a set of  binary  tables  used  by  the  MicroScope
       debugger  to  work   with   a   particular   processor   and   target
       configuration.

       The cpu definition source file is called <cpu>.CPU,  where  <cpu>  is
       the name assigned to the processor. For example, the 8051 source file
       is called 8051.CPU.  The binary output is written to a file with  the
       name  <cpu>.DMS,  and  can  be  loaded  by  MicroScope  as  a  target
       definition file.

    2. Source File Format

       The following statements may be presented in  the  target  definition
       source file. Please also refer to the included .CPU example files.

       2.1 Comments

          Any line beginning with ';' is considered to be a comment by DMSC,
          and is ignored.  Comments may also be placed  after  most  command
          lines.

       2.2 Numeric Values

          Any time the compiler is scanning for a  numeric  value  from  the
          input file, that value can be entered as:

            n       - DECIMAL number        eg: 123
            %b      - BINARY number         eg: %1111011
            @o      - OCTAL number          eg: @173
            $x      - HEXADECIMAL number    eg: $7B
    Dunfield MicroScope Compiler                                     Page: 2


       2.3 Memory Block Definition

             #memory low high DTR-r DTR-w Name [;comment]

            low     = Lower bound of memory ($0000-high)
            high    = Upper bound of memory (low-$FFFF)
            DTR-r   = DTR signal state when memory is READ *
            DTR-w   = DTR signal state when memory is WRITTEN *
            name    = Visible name assigned to memory block

          Up to 6 memory blocks may defined,  which represent the 6 possible
          target system memory blocks available in MicroScope. Each block is
          used to represent a different type  of  memory  available  on  the
          target system, and can have an address range of 64K bytes.

          Many targets will have only one memory block,  however some  CPU's
          have more than one memory address space. For example, and 8051 has
          FOUR different memory address types: Code, Data,  Internal and SFR
          memory.  Each of these types represents  a  unique  address  space
          within the processor.

          Memory blocks are defined in the order in which they occur in  the
          .CPU source file (ie: block-1 is the first definition etc.)

          * To accommodate some systems which require a hardware  switch  to
          access certain types of memory (eg:  8051 cannot write CODE memory
          unless it is temporarily mapped as data),  MicroScope will control
          the state of the DTR signal on the serial port according to  these
          parameters.  This signal can be used by the  target  interface  to
          perform the necessary remapping if desired.


       2.4 Target Parameters

             #target option [option ...]

          This command identifies  options  and  associates  characteristics
          with the target system and processor:

          2.4.1 ID=xxxx - Kernel ID

             Identifies the target processor.  Used by MicroScope  to  match
             the  target  definition  file  with  the  target  kernel.  This
             definition is required,  and may be any 16  bit  number  except
             $0000.

          2.4.2 BPSIZE=n - Breakpoint size

             Identifies  the  size  of  the  breakpoint  opcode.   Used   by
             MicroScope to determine how many  bytes  to  save/restore  when
             implanting breakpoints.  If not specified,  defaults to 1  (one
             byte breakpoint opcode).
    Dunfield MicroScope Compiler                                     Page: 3


          2.4.3 QUERY=xx - Kernel query command code

             Identifies the kernel command byte for a QUERY operation.  Used
             by MicroScope to interrogate the target  system  and  determine
             the identity  of  the  installed  kernel.  This  definition  is
             required.

          2.4.4 BREAK=xx - Kernel breakpoint command code

             Identifies the kernel command byte for  setting  a  breakpoint.
             Used by MicroScope to issue  SET  BREAKPOINT  commands  to  the
             target  kernel.  If  not  specified,  no  breakpoints  will  be
             permitted.

          2.4.5 EXEC=xx - Kernel execute command code

             Identifies the kernel command byte for  full  speed  execution.
             Used  by  MicroScope  to  launch  the  target  processor.  This
             definition is required.

          2.4.6 ABORT=xx - Kernel abort command code

             Identifies the kernel command byte to halt execution.  Used  by
             MicroScope to STOP a running target.  Upon receiving the  ABORT
             command,  the target  will  perform  as  if  a  breakpoint  had
             occurred,  responding  with  the  break  sequence  to  transfer
             control back to MicroScope.  If not specified,  and -DTRSTOP is
             not in effect,  the F9=Stop option will  not  appear  when  the
             target is running.

          2.4.7 STEP=xx - Kernel step command code

             Identifies the kernel command byte to  perform  a  single-step.
             Used by MicroScope for step-into operations.  If not specified,
             MicroScope will perform all single-step operations  by  setting
             breakpoints.

             [Note: If the kernel support a STEP command,  this is preferred
             to setting breakpoints,  as a)  single-step can be performed in
             ROM,  and b)  single-step via breakpoints  cannot  be  used  on
             self-referencing instructions]
    Dunfield MicroScope Compiler                                     Page: 4


          2.4.8 UPDATE=xx - Kernel update command code

             Identifies the kernel command byte used for a  target  register
             update.  Used by MicroScope to update target registers such  as
             segment or memory bank registers which may need to  be  updated
             before a kernel memory access is performed.

             For example, the 68HC16 has 16 64K memory blocks,  which cannot
             be directly handled by MicroScope (which has only 6 blocks). To
             accommodate this,  three blocks are identified to be associated
             with the  three  68HC16  index  registers.  The  actual  memory
             referenced depends on the 68HC16 index extension registers.  To
             allow MicroScope to correctly reference this  memory  when  the
             extension registers  have  been  changed  within  the  debugger
             (since the last upload from the target),  MicroScope perform  a
             REGISTER UPDATE command when the  registers  are  modified,  to
             make  sure  the  target  registers  stay  "in  sync"  with  the
             debugger.

             If  not  specified,  no  REGISTER  UPDATE  function   will   be
             performed.

          2.4.9 READt=xx - Kernel read memory command

             Identifies the kernel command byte used to  read  memory  block
             't'  (1-6).  This option is  REQUIRED  for  each  memory  block
             defined.

          2.4.10 WRITEt=xx - Kernel write memory command

             Identifies the kernel command byte used to write  memory  block
             't'  (1-6).  If not specified for a memory block which has been
             defined, that memory block is deemed to be READ ONLY.

          2.4.11 RESPn=xx - Query/Response byte

             Identifies the Query/Response byte  'n'  (1-2)  which  will  be
             transmitted from the kernel following  a  QUERY  command.  Both
             definitions (RESP1= and RESP2=) are REQUIRED.

          2.4.12 -INVDTR - Invert DTR logic

             Informs MicroScope that  the  DTR  logic  for  this  target  is
             inverted. Ie: DTR will be Deasserted when MicroScope sets it ON
             and Asserted when MicroScope sets it OFF.

          2.4.13 -INVRTS - Invert RTS logic

             Informs MicroScope that  the  RTS  logic  for  this  target  is
             inverted. Ie: RTS will be Deasserted when MicroScope sets it ON
             and Asserted when MicroScope sets it OFF.

             RTS is used by MicroScope to RESET the target system.
    Dunfield MicroScope Compiler                                     Page: 5


          2.4.14 -DTRSTOP - Deassert DTR to halt system

             Informs MicroScope that DTR can be used to  stop  an  executing
             system.  When the F9=Stop option is pressed while the target is
             running,  MicroScope will  lower  DTR  and  wait  for  a  break
             sequence to be received from the target.

          2.4.15 -SADDRL - Send addresses in Little Endian

             When addresses  are  sent  to  the  target  kernel,  MicroScope
             normally sends them in Big Endian  format  (high  byte  first).
             This is the natural order for most small CPU's,  which may need
             to receive the data directly into the low byte of a double-byte
             accumulator, and hence wants to get the low byte LAST.

             This option informs MicroScope that  all  addresses  should  be
             send in Little Endian format (low byte first) instead.

          2.4.16 -RVECTOR - Reset PC via vector

             Informs MicroScope that the target  system  uses  a  VECTOR  to
             establish  the  reset  address.  When  this  option  is   used,
             MicroScope reads the word of memory at  the  default  PC  value
             specified in the target configuration,  and uses the content of
             that word as the initial PC.  When  not  specified,  MicroScope
             uses the actual default PC value as the initial PC.

          2.4.17 -BENDIAN - Target processor stores memory in BIG endian

             Informs MicroScope that the  target  system  stores  multi-byte
             values in memory in BIG endian format. If not specified, Little
             Endian is assumed.

          2.4.18 -WORDALIGN - Target processor must have word aligned PC

             Informs MicroScope that the target system must always have it's
             PC word aligned.  When this option is in effect, and MicroScope
             finds  the  PC  to  contain  an  ODD  value,   the   value   is
             automatically rounded down  to  an  even  one,  and  a  warning
             message is displayed.
    Dunfield MicroScope Compiler                                     Page: 6


       2.5 CPU Register Definitions

             #registers name[@n][:bbbbb].size ...

          Specifies the target processor registers.

          Registers are defined in the order in which they  occur,  and  the
          FIRST register defined MUST be  the  target  CPU  program  counter
          (Instruction Pointer).

          The  'size'  parameter identifies the size of  the  register  (0-7
          bytes).  A value of zero  (0)  is a special case,  and  marks  the
          register as a name only.  This is useful to provide indexed  names
          in the disassembler  (see later).  Registers of  size  0  are  not
          displayed in the register summary or offered for  modification  in
          the register editor.

          Additional bits in the size parameter have the following meanings:

            7-6 = # chars to drop from beginning of name in summary display
            5-4 = # chars to drop from end   of name in summary display
            3   = Do not display at all in summary display

          The '@n' parameter identifies the register as a "pointer" register
          into memory block  'n'  (1-6).  When this option is included,  the
          register editor will show the content of memory at  this  register
          address.

          The ':bbbb'  option identifies a bitmask which is displayed in the
          register editor corresponding to the bits  set  in  the  register.
          This is normally used to give letters to condition  code  register
          bits.

          Up to 64 registers may be defined,  which can be any mix of actual
          CPU registers, and "size=0" indexed names for the disassembler.


       2.6 CPU Register Default Values

             #defreg value ...

          Defines a string of up to 255 bytes which are assigned to the  CPU
          registers as default values following startup or a  reset.  Values
          are assigned to the registers in the order in which the  registers
          are defined.

          Multi-byte registers must have  the  values  occurring  in  LITTLE
          ENDIAN order REGARDLESS of the native byte ordering of the  target
          CPU.

          If initial  values  are  not  specified  for  all  registers,  the
          remaining registers will have zeros assigned to them  at  startup,
          and will not be altered following a reset.
    Dunfield MicroScope Compiler                                     Page: 7


       2.7 Preassigned Symbols

             #symbol <memory-type> <value>=<name> [<value>=<name> ...]

          Assigns a symbolic name  to  a  value.  The  <memory-type>  option
          identifies the type of symbol:

            0   = Constant Symbol
            1-6 = Address within memory block
            7   = Stack offset (not normally used for preset symbols)

       2.8 Kernel Command Sequences

          This group of commands defines the command sequences that are sent
          and received with the debug kernel residing in the target system.

          2.8.1 Command Code Prefix

                #command <byte> [<byte> ...]

             Identifies a string of bytes which  are  sent  preceding  every
             command sent to the kernel.  This is used for systems in  which
             the serial port also carries other  traffic,  to  minimize  the
             chances that "random" data will be incorrectly identified as an
             MicroScope command.  This string  should  be  set  to  a  short
             sequence of bytes which  is  unlikely  to  occur  in  the  data
             stream.

             When using  this  feature,  the  target  kernel  must  also  be
             modified to detect the command code prefix before  accepting  a
             command.

             Use of a command code prefix is not required.

          2.8.2 Kernel memory definition

                #kermem <type(1-6)> <size(1-255)> <address>

             Defines  a   block   of   "kernel   memory"   which   will   be
             uploaded/downloaded to/from MicroScope when  control  transfers
             back and forth with the target. This is useful on small systems
             which cannot afford to "waste" a block of memory for the kernel
             variables and stack.

             When the target is stopped  (breakpoint/stop etc.)  the  kernel
             memory block is uploaded to MicroScope along  with  the  target
             registers.  The target kernel can  then  use  it  as  required.
             Later,  when the target is launched,  MicroScope will  download
             the kernel memory block to the target,  thereby restoring it to
             the original values at the time the target stopped.

             Use of a kernel memory block is not required.
    Dunfield MicroScope Compiler                                     Page: 8


          2.8.3 Target Launch Sequence

                #launch <item> ...

             Identifies a command sequence which will be sent to the  target
             when MicroScope launches it  (either execution or single step).
             The format of the kernel command which will be generated is:

                - Command Code Prefix (if defined)
                - EXEC or STEP command code (defined with #target)
                - Items defined by this Sequence

             The following items may be entered into the sequence:

                <reg    = Register content in Little Endian format
                >reg    = Register content in Big Endian format
                *KM     = Kernel memory block
                *IL     = Instruction length        (step only) **
                *IF     = Instruction flags         (step only) **
                *JL     = Low byte of JMP address   (step only) **
                *JH     = High byte of JMP address  (step only) **
                byte    = Fixed byte value in the range of 128-255
            ** = Values determined by disassembler - see section

          2.8.4 Target Update Sequence

                #update <item> ...

             Identifies a command sequence which will be sent to the  target
             to update memory addressing registers  when  they  are  changed
             from the MicroScope user interface  (See #target UPDATE=).  The
             format of the kernel command which will be generated is:

                - Command Code Prefix (if defined)
                - UPDATE command code (defined with #target)
                - Items defined by this Sequence

             The following items may be entered into the sequence:

                <reg    = Register content in Little Endian format
                >reg    = Register content of Big Endian format
                *KM     = Kernel memory block (not normally used)
                byte    = Fixed byte value in the range of 128-255
    Dunfield MicroScope Compiler                                     Page: 9


          2.8.5 Target Break Sequence

                #break <prefix bytes> <items ...>

             Identifies a sequence of items which are sent from  the  target
             system to MicroScope when the target is stopped  (breakpoint or
             STOP command). The sequence should begin with a string of fixed
             bytes  (128-255 only)  which are used by MicroScope to identify
             that a break sequence is occurring:

             The following items may be entered into the sequence:

                byte    = Fixed byte value in the range of 128-255
                <reg    = Register content in Little Endian format
                >reg    = Register content of Big Endian format
                *KM     = Kernel memory block


       2.9 Disassembler Commands

          The disassembler commands define to MicroScope how to  decode  the
          binary code of the target processor into viewable instructions, as
          well as how to identify jump/call and conditional instructions.

          2.9.1 Key name definitions

                #keyname <word> ...

             Identifies common keywords which  can  occur  in  the  assembly
             language operands  of  the  disassembler.  These  keywords  are
             stored in a table and included in a  disassembler  table  entry
             with a single byte.

             Up to 64 keynames and registers may be defined.

          2.9.2 Extra word definition

                #extra <word> ...

             Identifies less common keywords which can occur in the assembly
             language operands of the disassembler.  Unlike "keyname", these
             words are not stored in a table,  but will be encoded  directly
             into each disassembler table entry.  Normally  used  for  words
             which occur only once.
    Dunfield MicroScope Compiler                                     Page: 10


          2.9.3 Disassembly Operand functions

                #func <name> <function definition string>

             Identifies named  "functions"  which can be invoked within  the
             operands to an instruction.  Used to retrieve and manipulate  /
             display values from the instruction object code,  as well as to
             identify special instructions that  MicroScope  needs  to  know
             about.

             The function definition string contains a series of values  and
             operators  called  "elements"  which   perform   the   required
             functions.  Note that values  <192 will be stored as  a  single
             byte, while values >=192 will be stored as 3 bytes.

             As a function is processed,  it operates with a running "value"
             as each operator is processed,  the value is usually updated or
             replaced with a new value. To allow for more complex functions,
             there are three variables which can be used to hold  one  value
             while another is being manipulated.

          2.9.4 Value Elements

             The following elements retrieve a value which becomes  the  new
             "running" value of the function:

                n       = Constant value  (n %b @o $x)
                )       = Retrieve content of variable 1
                }       = Retrieve content of variable 2
                ]       = Retrieve content of variable 3
                On      = Get OPCODE byte value (n=0-7)
                P       = Get PC (instruction pointer) address
                .name   = Get constant register index: 0-(#regs-1)

          2.9.5 Value Modification Operators

             These operators translate the running function value into a new
             value:

                E       = Sign extend (low byte into high)
                H       = Save HIGH BYTE only (& $FF00)
                L       = Save LOW  BYTE only (& $00FF)
                T       = Transpose (swap) high and low bytes
                Mn      = Retrieve word from memory type n (1-6) **
                V       = Retrieve current value of register     **

                ** = Processed only for single-stepping
    Dunfield MicroScope Compiler                                     Page: 11


          2.9.6 Arithmetic Operators

             These operators accept the running function to  the  left,  and
             ONE value element on the right.  The running function value  is
             replaced with the result of the arithmetic operation:

                +       = Addition
                -       = Subtraction
                *       = Multiplication
                /       = Division
                %       = Modulus (remainder after division)
                &       = Bitwise AND
                |       = Bitwise OR
                ^       = Bitwise EXCLUSIVE OR
                <       = Shift Left
                >       = Shift Right
                ~       = Compare (result is 1 if equal)

             Note that operations occur left to right  with  no  precedence.
             Since ONLY ONE value element is accepted to right of arithmetic
             operators,  you  must  use  a  variable  to   process   complex
             operations with sub-expressions:

                                 eg: xxx(yyyo)

          2.9.7 Display Operators

             These operators are used to output the  running  value  in  the
             specified format:

                B       = Display as HEX BYTE
                C       = Display as ASCII character
                D       = Display as SIGNED DECIMAL
                U       = Display as UNSIGNED DECIMAL
                R       = Display as REGISTER name (0-(#regs-1))
                W       = Display as HEX WORD
                Sn      = Display as SYMBOL/type=n (1-6) **

             ** When Sn is used,  the next operator is skipped if a matching
             symbol of the requested type exists.  This is normally used  to
             output the value  if  a  symbol  is  NOT  found.  eg:  'xxxS1W'
             displays the type1 symbol with a value of 'xxx',  or a HEX WORD
             if no such symbol exists.
    Dunfield MicroScope Compiler                                     Page: 12


          2.9.8 Special Purpose Operators

             These operators perform functions which do not  fall  into  the
             above catagories:

                X       = Exit (terminate function processing)
                (       = Store value in variable 1
                {       = Store value in variable 2
                [       = Store value in variable 3
                ?a:b!   = Conditional:
                            if value != 0 perform 'a' string
                            if value == 0 perform 'b' string (optional)
                '..."   = Loop (perform ... continuously)
                            Use 'X' or '?' to exit
                =name   = Link to another function
                            (Continue in new function)
                I       = Identify special opcode **
                J       = Identify JUMP address   **

             The 'I'  and  'J'  operators are processed when single-stepping
             only.

             'I'  is used to set instruction flag bits  which  are  used  by
             MicroScope to properly single-step transfer instructions.  Note
             that 'I' bits are set by ORing into an initial 0. Ie: once set,
             'I'  bits cannot be cleared.  This also means that you can  set
             bits without worrying about preserving  those  bits  which  are
             already set.

                %10000000   = JUMP address available (set by 'J')
                %00000010   = Conditional JMP/CALL instruction
                %00000001   = Call instruction

             'J'  is used to inform MicroScope  of  an  alternate  execution
             address for an instruction.  In the case of a JUMP instruction,
             you should use the  'O'  operator and read the  target  address
             from the instruction opcode and set  it  with  'J'.  Note  that
             RETURN is a transfer instruction, and must be identified with a
             JUMP address.  This is normally determined by reading the stack
             pointer and then the indicated memory location of  the  top  of
             the stack.
    Dunfield MicroScope Compiler                                     Page: 13


       2.10 Opcode -> Instruction Definitions

             <length> <match bytes...> = <instruction name> [operands]
                                     - or -
             <length> <match bytes...> ~ <instruction name>

          These definitions describe  the  translation  between  binary  CPU
          opcodes,  and the ASCII disassembly text shown when no source file
          is available.  They also provide the  information  required  about
          conditions /  jumps  /  calls  required  for  single-stepping  the
          target.

          The source file must contain one opcode ->  instruction definition
          for each possible binary opcode available on the target CPU.

          <length> is the total length of the instruction in bytes. When the
          disassembler finds a match,  it assumes that the next  instruction
          will begin this many bytes beyond the one matched.  Length may  be
          up to 7 bytes.

          <match bytes> are the actual bytes of object code which must match
          the instruction being disassembled in order for the instruction to
          be identified as "this one". The usual n, %b, @o and $x values can
          be used, as well as a special partial match binary form:

                         .bbbbbbbb = Match these 8 bits

                b = 0 - Bit must be 0
                    1 - Bit must be 1
                    x - Bit is "Don't Care"

                eg: .11xx0101   - Match $C5, $D5, $E5 and $F5

          Up to 4 <match bytes> (32 bit opcode) can be specified.

          There is a limitation where the number  of  "extra"  bytes,  those
          which are operands only  (ie:  not included in  <match bytes>  but
          included in the instruction length)  cannot  exceed  3.  In  other
          words,  the entire length of the instruction cannot be more than 3
          greater than the number of <match bytes> specified.

          A useful trick if you need more than 3  "extra"  bytes is  to  add
          dummy <match bytes> of .xxxxxxxx (which will match anything).

          '=' or '~' identify the end of the <match bytes> and the beginning
          of the <instruction> text. Use of '=' will place the <instruction>
          mnemonic  text  into  a  table,  so  that   multiple   instruction
          definitions  will  need  only  one  byte  to  include   the   full
          instruction name.  '=' will also automatically tab the output over
          8 columns from the beginning of the instruction text  to  position
          the operand output.

          Use of  '~'  will encode the instruction name  directly  into  the
          instruction which takes up less space for a  single  use,  however
          the name will be stored multiply if used in multiple  definitions.
          Also, '~' does not provide for operand output.
    Dunfield MicroScope Compiler                                     Page: 14


          <instruction> is the instruction mnemonic which is to be displayed
          for this instruction.

          <operands> are any instruction operands which should be output for
          the instruction.  Any symbolic names encountered will be looked up
          as register or function  names,  and  encoded  as  a  single  byte
          reference to the indicated register or function.  If you  need  to
          use symbolic names in a function operand which are not register or
          function names, they must be defined with the #extra command.

          You may place  ';'  and a comment after the function definition if
          you like.  If you wish to place a  ';'  in the operand definition,
          use TWO of them together ';;'.

          The LAST opcode->instruction definition in the source file MUST be
          one which will match ANY opcode. MicroScope uses this to guarantee
          that all instructions be found,  and will have a  text  string  to
          output.  Normally, this will be a one byte instruction with <match
          bytes>  of .xxxxxxxx indicating  that  any  byte  will  do  (CPU's
          requiring word alignment may wish to have an instruction  size  of
          2).
                eg: 1 .xxxxxxxx ~ ?     ; trap unrecognized opcodes
    Dunfield MicroScope Compiler                                     Page: 15


    3. The DMS Test Utility

       DMST is a utility to assist in the testing and debugging  of  a  .DMS
       target definition file created with DMSC.

       Before using DMST,  you must set the environment variable  DMSCPU  to
       the name of the target definition file.  Ie:  To debug 8051.DMS,  you
       must:

                                set DMSCPU=8051

       Two optional flags may be  appended  to  the  DMSCPU  definition,  by
       following the CPU with with ':' and then the flag characters:

       The 'I' flag causes DMST to initialize all CPU registers which do not
       have a default  value  assigned  (#defreg)  with  an  ascending  byte
       sequence beginning with 1 and increasing by 1 for each byte assigned.
       This is useful for testing calculated transfer  addresses  which  are
       derived from general registers.

       The 'R'  flag causes DMST to display the assigned CPU register values
       before performing a disassembly.

                             eg: set DMSCPU=8051:IR

       When run with no options,  DMST  simply  dumps  the  content  of  the
       <cpu>.DMS file.

       If you specify HEX bytes as command line options to  DMST,  the  data
       will be disassembled as if it were an instruction located  in  memory
       at the address of  the  default  PC  value.  DSMT  will  display  the
       disassembled instruction, as well as any instruction flags which have
       been set  (see 'I'  function under  'Disassembly Operand Functions'),
       and 'J'ump addresses.

       Note,  if you do not supply enough data bytes to  "fill"  the decoded
       instruction, DMST will automatically append 12 34 56 78 9A.
    Dunfield MicroScope Compiler                                     Page: 16


    4. DMS Kernel Simulator

       DMSKS is a kernel simulator,  which allows you to use another PC as a
       simulated target system for MicroScope.  This  is  very  useful  when
       debugging target definitions and other system settings. The second PC
       (running DMSKS)  must be connected via  a  serial  cable  to  the  PC
       running MicroScope.

       DMSKS uses the same Target Definition (.DMS file) as MicroScope.  The
       name of this file must be specified on the DMSKS command line:

                             DMSKS <cpu> [options]

       The available options are:

       -E - Simulate Execution This causes DMSKS to simulate  the  execution
            of a program when it receives the EXEC command from  MicroScope.
            The PC will run through each instruction address as it  if  were
            executing. JMPS and CALLS will perform the transfer.

       -Q - Quiet mode Runs DMSKS with less screen  output.  Does  not  show
            every target command as it is received.

       -R  -  Random  Conditional  Transfers  Used  with  '-E'  ...   Causes
            conditional transfer instruction to be taken only about  50%  of
            the time.

       -S - Automatic  STEP  on  EXEC  Causes  DMSKS  to  act  as  if  every
            instruction were breakpointed.  This causes control to return to
            MicroScope immediately after  the  first  instruction  has  been
            "executed" in response to an EXEC command.

     B=xx - Set  breakpoint  opcode  Used  with  '-E'  ...  This  option  is
            necessary to inform DMSKS of the opcode byte value  used  for  a
            breakpoint instruction. This value will be implanted in response
            to a SET BREAK command,  and will cause  control  to  return  to
            MicroScope when it is encountered during simulated execution.

    C=1-4 - Specify COM port Identifies the PC COM port (COM1-COM4) used for
            the serial connection to MicroScope.

      E=n - Set auto-eject timer DMSKS will  automatically  insert  a  blank
            line in the output when this many "ticks" of the BIOS 55ms clock
            have occured with no serial activity.  This provides nice visual
            seperation of the commands  and  responses  resulting  from  one
            MicroScope action.  The default value of 18 provides a 1  second
            timer.

      T=ms - Trace execution timer

            Used with '-E' ... Inserts a <ms> millisecond delay between each
            simulated instruction execution.
